#Hiring #IP & #SOC #Verification Engineers
Experience: 1.5+ years(Relevant Experience- Excluding internships & trainings)
Notice Period: Immediate to 1 Month
Location: #Bangalore/ #Noida/ #Hyderabad/ #Pune
Interested candidates can share their resume at, medha.gaur@truechip.net

Excellent Opportunity For #M.Tech #Trained #Freshers For #Noida Location :
1: #RTL Design Engineer 
2: #Verification Engineer 
3: #DFT Engineer 
4: #Embedded Engineer ( #Preferred if you are in #North Location only)
5: #Physical Design Engineers (Preferred if you are in #North Location only) Please share your resume on madhuri.tomar@incise.in 

Articles series introduces Python usage as a verification language and implementing the UVM using it:
1. #Verification Learns a New Language: https://lnkd.in/e7xYmsKf

2. Introduction to #Coroutines: https://lnkd.in/eWBr3iRu

3. #Cocotb Bus Functional Models: https://lnkd.in/eMaTM3Kj

4- #Python and the #UVM: https://lnkd.in/eE-vcmer

#pyuvm 2.0 release: https://lnkd.in/e2Jts7nw

#0nsite #UK Opportunities Senior #CPU/ #GPU #Verification[4-6Years]
Long term Assignment

Job Description
1. Verify CPU and GPU technologies using #UVM.
2. Develop Test plans and strategies.
3. Contribute to test bench development and verification improvements.
Desirable
I.Experience in IP level verification and UVM.
2.Background in CPUs/GPUs or Complex RTL Designs.

Interested, Kindly share your profile to gopi.a@blueberrysemi.com

Join Cadence (Invecas) HYD's dynamic team! We're looking for Verification experts with 5-15 years of experience in IP/Sub-system/SOC level verification. Key requirements include:

- Proficiency in developing test bench/test cases using System Verilog & UVM.
- Demonstrated leadership in verification closure for complex IP/SOC projects.
- Familiarity with code coverage, functional coverage & assertions.
- Experience in CPU verification, Memory controller verification, DDR Protocols (DDR4, DDR5, LPDDR4, LPDDR5), USB 2 and USB 3 protocols, PCIE, and Bus protocols (AXI/AHB/APB).
- Exposure to industry-standard verification tools for simulation and debugging.
- Strong debugging and problem-solving abilities.
- Excellent communication skills.

If you meet these criteria and are interested in joining our team, please share your updated profile with us at dsupriya@cadence.com. Exciting opportunities await! hashtag#Verification hashtag#CadenceHYD hashtag#JoinOurTeam

https://cadence.wd1.myworkdayjobs.com/External_Careers/job/Invecas-Hyderabad/Principal-Design-Engineer_R47932

7Rays Semiconductors India Private Limited is hiring for below positions.
1. hashtag#Verification engineers with 5+ Years expertise in hashtag#Systemverilog & hashtag#UVM for hashtag#Bangalore.

2. hashtag#IPDesign engineer with 5+ Years expertise in hashtag#verilog, developing protocol layers in hashtag#AXI4/5 OR hashtag#PCIe/CXL for hashtag#Bangalore.

3. hashtag#SOCDesign engineer with 5+ Years expertise in hashtag#Lowpower for hashtag#Bangalore.

Interested engineers share updated resume to sridhar.jv@7rayssemi.com & spread the word across with your collegues & friends which helps the need.