Minimum requirements:
* Bachelors degree in Electrical Engineering, Electronics Technology, Electrical Engineering Technology, Electrical and Computer Engineering or related field
* Cumulative 3.0/4.0 GPA or higher

APPLY: https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/job/25017396/?utm_medium=ELECTRONICSGEEK


📢 Join the Electronics Geek Community 👇🏻
✅Telegram: https://telegram.dog/electronicsgeekchannel
✅WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E
✅ YouTube: https://www.youtube.com/@electronicsgeek

💸 About to spend thousands on a VLSI course?
First understand what a Verification Engineer actually does, for just ₹99.

🔍 Live webinar: What is Functional Verification?
👨‍💻 With Mr. Sha: 9+ yrs in industry, worked on-site at ARM & NVIDIA, DV interview panelist

📅 Sun, 18 Oct | 11 AM
👉 https://topmate.io/electronics_geek/2358022

Forward to your ECE friends 🙌

🚨 MICRON IS HIRING! 🚨
🔥Role: MTS - ANALOG LAYOUT

📍 Location: Bengaluru

🔬 Skills Required:
Full-Custom Layout • FinFET (3nm / 5nm) • DRC / LVS • Device Matching • Python Scripting


📢 Join the Electronics Geek Community 👇🏻
✅Telegram: https://telegram.dog/electronicsgeekchannel
✅WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E
✅ YouTube: https://www.youtube.com/@electronicsgeek


👉 Apply Now:
https://careers.micron.com/careers/job/44989750

🔁 Share this with an ECE/EEE friend looking for a semiconductor opportunity!

⏳ TOMORROW, 11 AM!

😓 Freeze when the interviewer asks “How would you verify this design?”

Learn how verification really works, live from Mr. Sha, who takes DV interviews himself 🎯

🔍 What is Functional Verification?
📅 Sun, 18 Oct | 11 AM
🎟 Just ₹99 | Last few seats

👉 https://topmate.io/electronics_geek/2358022

🔴 TODAY, 11 AM
Live VLSI Webinar: Functional Verification with a real DV interview panelist 🎯
Last chance at ₹99 👇
https://topmate.io/electronics_geek/2358022

We are live 🔥

🙏 Thanks to everyone who joined today’s session with Mr. Sha!

3 key takeaways on Functional Verification:

1️⃣ Design says what the chip does; verification proves it does it correctly
2️⃣ ~60–70% of chip project effort goes into verification, which is why DV roles are in high demand
3️⃣ Start with Verilog testbenches → then SystemVerilog → then UVM

Missed it? Drop a 🙋 and we’ll plan another one

🚀 **Hiring: DV Engineers – Trained Freshers**

🏢 **Company:** Vidian
💼 **Role:** Design Verification Engineer
📍 **Location:** Hyderabad & Bangalore

**Eligibility:**
• B.E./B.Tech in ECE, EEE, E&I or related branches
• 2022, 2023, 2024 & 2025 batches
• Must have completed DV training

**Skills:** SystemVerilog, UVM, Verilog, ASIC Verification

📩 **share your CV:** careers@vidian.in

📢 Follow on WhatsApp for more VLSI jobs:
https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

🚨 META IS HIRING! 🚨
🔥Role: ASIC Engineer – Design Verification

📍 Location: Bengaluru

🎓 Eligibility:
✅ Bachelor's in Computer Science / Computer Engineering or related field
✅ 2+ years in SystemVerilog/UVM or C/C++ based verification

🔬 Skills: SystemVerilog • UVM • Assertions / Formal / Emulation • Python / TCL / Perl

👉 Apply Now:
https://www.linkedin.com/jobs/view/4433158142/

📢 Follow on WhatsApp for more VLSI jobs:
https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

🔁 Share this with an ECE/EEE friend looking for a semiconductor opportunity!

🚀 Synopsys Hiring: CFD Intern (Pune)

* Role: Computational Fluid Dynamics (CFD) Intern
* Location:Pune, India (Onsite, Full-Time)
* Duration & Stipend: 6 months | ₹45K/month
* Eligibility: Master’s in Mechanical, Aerospace, or Thermal Engineering (2027 batch)
* Key Skills: ANSYS Fluent, ANSYS Workbench, CHT/Flow simulations

[Apply on Synopsys Careers](https://careers.synopsys.com/job/pune/computational-fluid-dynamics-cfd-internship/44408/101746583168)

📢 Follow on WhatsApp for more VLSI jobs:
https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

Hi Guys 👋🏻
🎥 New Job video is LIVE!

👉 Watch here: https://youtu.be/9HYOha_M74Y&list=UULFjx96VpV4g2KvuGt4wAjNrw

🔁 Share this with an ECE/EEE friend looking for a opportunity!

🚨 MICROCHIP TECHNOLOGY IS HIRING! 🚨
🔥Role: Engineer II – Verification

📍 Location: Chennai

🎓 Eligibility:
✅ Bachelor's or Master's in Electrical / Electronic Engineering or related field
✅ 2–4 years of experience in ASIC/SoC verification

🔬 Skills: SystemVerilog • UVM test environments • RTL & testbench debug

👉 Apply Now:
https://www.linkedin.com/jobs/view/4481799278/

📢 Follow on WhatsApp for more VLSI jobs:
https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

#Microchip #VLSIJobs #DesignVerification #UVM #ECEJobs #Semiconductor

😰 “Explain the AXI handshake.”
“What’s the difference between AHB and APB?”

These come up in almost every DV & RTL interview, and most freshers get stuck on them.

🔥 AMBA Protocols Live Batch with Mr. Sha (9+ yrs Experience )
✅ Protocol spec ✅ RTL slave ✅ Verilog testbench
📅 Sat–Sun, 24 & 25 Oct | 11 AM | ₹999
Last seats 👇
👉 https://topmate.io/electronics_geek/2348117

Honeywell is hiring Embedded Interns 🔥

✅ B.E / B.Tech students
✅ C / C++ + Microcontroller basics


https://ibqbjb.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/Honeywell/job/159847

📢 Follow on WhatsApp for more VLSI jobs:
https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

📊 APB vs AHB vs AXI (save this!)
🔹 APB: simple, for slow peripherals (UART, GPIO)
🔹 AHB: pipelined, supports bursts
🔹 AXI: 5 separate channels, fastest, most asked in interviews

Want to code all 3 yourself? Batch starts Saturday 👇
https://topmate.io/electronics_geek/2348117