#Hiring #IP & #SOC #Verification Engineers
Experience: 1.5+ years(Relevant Experience- Excluding internships & trainings)
Notice Period: Immediate to 1 Month
Location: #Bangalore/ #Noida/ #Hyderabad/ #Pune
Interested candidates can share their resume at, medha.gaur@truechip.net
Experience: 1.5+ years(Relevant Experience- Excluding internships & trainings)
Notice Period: Immediate to 1 Month
Location: #Bangalore/ #Noida/ #Hyderabad/ #Pune
Interested candidates can share their resume at, medha.gaur@truechip.net
7Rays Semiconductors India Private Limited, Great oppertunity to work full chip Design & Verification Trunky projects We're hiring for below positions.
1. hashtag#Designverification engineer with 5+ Years experise is hashtag#Systemverilog & hashtag#UVM for hashtag#Bangalore or hashtag#Noida Location.
2. hashtag#ASICRTL design engineers with 5+ Years experise in hashtag#AXI4 / hashtag#PCIE hashtag#IPdevelopment Good understanding of hashtag#PCIE TLP structures for hashtag#Bangalore or hashtag#Noida Location.
Interested engineers please share update resume to sridhar.jv@7rayssemi.com, or spread the work across which can help the interested engineers.
1. hashtag#Designverification engineer with 5+ Years experise is hashtag#Systemverilog & hashtag#UVM for hashtag#Bangalore or hashtag#Noida Location.
2. hashtag#ASICRTL design engineers with 5+ Years experise in hashtag#AXI4 / hashtag#PCIE hashtag#IPdevelopment Good understanding of hashtag#PCIE TLP structures for hashtag#Bangalore or hashtag#Noida Location.
Interested engineers please share update resume to sridhar.jv@7rayssemi.com, or spread the work across which can help the interested engineers.
Hi All,
hiring for VLSI Engineer
PD hashtag#DV #DFT #Memorylayout Engineers
#Location: #Bangalore
Notice period : immediate
Interested Engineers, Please share your profile to deepika.poojary@acldigital.com .
hiring for VLSI Engineer
PD hashtag#DV #DFT #Memorylayout Engineers
#Location: #Bangalore
Notice period : immediate
Interested Engineers, Please share your profile to deepika.poojary@acldigital.com .
MosChip® is looking to hire an IP/NVMe Verification Engineer in hashtag#Bangalore and hashtag#Hyderabad. If you have a notice period of immediate to 30 days, this could be the opportunity for you!
What We’re Seeking:
- Proficiency in NVMe Protocol understanding.
- Ability to develop verification environments and test cases.
- Hands-on experience in NVMe subsystem verification.
- Expertise in defining verification scopes, creating test plans, and developing test scenarios for the NVMe subsystem.
- Proficiency in SystemVerilog, UVM, or similar verification methodologies.
- Experience in test plan development and execution.
To apply, send your resume to venkata.rapaka@moschip.com. Join us in shaping the future of IP/NVMe verification!
What We’re Seeking:
- Proficiency in NVMe Protocol understanding.
- Ability to develop verification environments and test cases.
- Hands-on experience in NVMe subsystem verification.
- Expertise in defining verification scopes, creating test plans, and developing test scenarios for the NVMe subsystem.
- Proficiency in SystemVerilog, UVM, or similar verification methodologies.
- Experience in test plan development and execution.
To apply, send your resume to venkata.rapaka@moschip.com. Join us in shaping the future of IP/NVMe verification!
MosChip® is looking to hire an IP/NVMe Verification Engineer in hashtag#Bangalore and hashtag#Hyderabad. If you have a notice period of immediate to 30 days, this could be the opportunity for you!
What We’re Seeking:
- Proficiency in NVMe Protocol understanding.
- Ability to develop verification environments and test cases.
- Hands-on experience in NVMe subsystem verification.
- Expertise in defining verification scopes, creating test plans, and developing test scenarios for the NVMe subsystem.
- Proficiency in SystemVerilog, UVM, or similar verification methodologies.
- Experience in test plan development and execution.
To apply, send your resume to venkata.rapaka@moschip.com. Join us in shaping the future of IP/NVMe verification!
hashtag#JobOpening hashtag#Engineering hashtag#VerificationEngineer hashtag#ApplyNow
What We’re Seeking:
- Proficiency in NVMe Protocol understanding.
- Ability to develop verification environments and test cases.
- Hands-on experience in NVMe subsystem verification.
- Expertise in defining verification scopes, creating test plans, and developing test scenarios for the NVMe subsystem.
- Proficiency in SystemVerilog, UVM, or similar verification methodologies.
- Experience in test plan development and execution.
To apply, send your resume to venkata.rapaka@moschip.com. Join us in shaping the future of IP/NVMe verification!
hashtag#JobOpening hashtag#Engineering hashtag#VerificationEngineer hashtag#ApplyNow