#SISOC SEMICONDUCTOR TECHNOLOGIES is looking for Trained or Internship experienced candidates.

Open positions: #Design Verification Engineer's


Qualification: B.E/B.Tech(2016-2019 paased out), M.E/M.Tech(2016-2021 passedout)

Notice period : Immediate - 15days

Location : Bangalore

Interested candidates kindly share your Resume's sai.sudha@sisocsemi.com
#electronicsgeek

Hi all,
Greetings from Juntran Technologies

We are hiring < 2020 #Trained_Freshers candidates in #vlsi domain for below requirements

#DESIGN_FOR_TESTABILITY
#DESIGN_AND_VERIFICATION
#RTL_VERIFICATION

Interested candidates can share their profiles to anithaakula@juntrantech.com

Hi All,
Greetings from Juntran Technologies,

Here we are hiring VLSI Trained freshers for the Bangalore Location,
hashtag#Physical Design
hashtag#Design for testability
hashtag#RTL Design
hashtag#Analog layout
hashtag#Immediate Hiring

If you have any profiles kindly share those Profiles to this email id :
reshmashaik@juntrantech.com