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Union Cabinet approves scheme for designing, manufacturing semiconductor chips in India
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Hi,

We have an opportunity for you, Please find the below JD:


Design Verification Engineers For PAN India


Experience in ASIC/SOC Verification experience

Experienced in System Verilog and any methodologies UVM/OVM

Experienced In one or two protocols like DDR, PCI-E, USB, SATA, Ethernet, AXI, etc..,

Experienced In Assertions and coverage



Work Location: Bangalore, Hyderabad,Cochin, Ahmedabad,Pune, Noida



Regards,
Harshitha R

Harshitha R
harshithar.67@wipro.com
harshithar@eximiusdesign.com
9739946955