HCLTech is Hiring! ๐
Are you an exceptional engineer ready to take on cutting-edge challenges in the semiconductor space?
Weโre looking for top-tier talent to join our team in Bangalore:
๐ Open Roles
ASIC/IP/SoC Verification Engineers โ 7+ years of experience
DFT Engineers โ 7+ years of experience
Notice Period โ 0 to 90 days
If you're passionate about innovation, precision, and building the future of silicon, we want to hear from you!
๐ฉ Refer or share profiles: aman-singh1@hcltech.com
Are you an exceptional engineer ready to take on cutting-edge challenges in the semiconductor space?
Weโre looking for top-tier talent to join our team in Bangalore:
๐ Open Roles
ASIC/IP/SoC Verification Engineers โ 7+ years of experience
DFT Engineers โ 7+ years of experience
Notice Period โ 0 to 90 days
If you're passionate about innovation, precision, and building the future of silicon, we want to hear from you!
๐ฉ Refer or share profiles: aman-singh1@hcltech.com
โค3
Greeting From Quest global !!!!
Hiring DV engineers with 4+yrs Experience
Location โ Bangalore / Hyderabad
Notice period - Immediate to 30 Days
Interested professional kindly share me your resume on Uzma.Faheen@quest-global.com
Hiring DV engineers with 4+yrs Experience
Location โ Bangalore / Hyderabad
Notice period - Immediate to 30 Days
Interested professional kindly share me your resume on Uzma.Faheen@quest-global.com
Hi Guyss ๐
New job video is out now! ๐ฅ
Apply Now
https://youtu.be/DyTQ0oUMA10
Show some love โค๏ธ & comment if you need help โ Iโm here to guide you ๐
New job video is out now! ๐ฅ
Apply Now
https://youtu.be/DyTQ0oUMA10
Show some love โค๏ธ & comment if you need help โ Iโm here to guide you ๐
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Electronics & Electrical Freshers Job | Microsoft Hiring 2026 | Apply Fast!
Hello Guys, Welcome to #electronicsgeek India's best electronics community.
โ Join our Telegram Channel:
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Recent Interview Questions for DV
We NextGenSilicon Technologies Pvt Ltd are hiring DFT Engineers in Bangalore with 3โ7 years of experience.
Key skills: Scan insertion, ATPG, MBIST, JTAG, and hands-on with industry tools (Synopsys / Cadence / Mentor).
๐ Location: Bangalore
โฑ๏ธ Notice Period: Immediate to 30 days preferred
If you are open to exploring this opportunity, please share your updated CV to saipreethi.tatireddy@nextgensilicon.com
Key skills: Scan insertion, ATPG, MBIST, JTAG, and hands-on with industry tools (Synopsys / Cadence / Mentor).
๐ Location: Bangalore
โฑ๏ธ Notice Period: Immediate to 30 days preferred
If you are open to exploring this opportunity, please share your updated CV to saipreethi.tatireddy@nextgensilicon.com
โค2
Hlo everyone!
Mirafra is hiring DV Engineer position 1-2 Years of Exp Immediate candidates Chennai Location. If anyone needs a reference, please share your updated resume to: anushakonda@mirafra.com
Mirafra is hiring DV Engineer position 1-2 Years of Exp Immediate candidates Chennai Location. If anyone needs a reference, please share your updated resume to: anushakonda@mirafra.com
Weโre Hiring: Design Engineer โ DV (2+ yrs hands-on experience)
Company: Truechip Solutions Pvt. Ltd.
Location: Noida / Bangalore
What Youโll Do:
Work on IP/SoC verification and VIP development.
Build and maintain hands-on testbenches, automation scripts, and verification environments.
Debug RTL issues, optimize verification flows, and collaborate with cross-functional teams.
Skills Weโre Looking For:
C / C++, Python / Shell scripting with practical implementation experience.
Verilog / SystemVerilog / UVM / OVM applied in real DV projects.
Linux and version control (Git / Perforce) for daily verification tasks.
Strong understanding of digital electronics and semiconductor fundamentals
Why Join Truechip?
Work on cutting-edge IP/SoC projects.
Hands-on exposure to DV methodologies and verification frameworks.
Grow under experienced mentors in a fast-paced semiconductor environment.
Apply Now: diksha10602@truechip.net
Company: Truechip Solutions Pvt. Ltd.
Location: Noida / Bangalore
What Youโll Do:
Work on IP/SoC verification and VIP development.
Build and maintain hands-on testbenches, automation scripts, and verification environments.
Debug RTL issues, optimize verification flows, and collaborate with cross-functional teams.
Skills Weโre Looking For:
C / C++, Python / Shell scripting with practical implementation experience.
Verilog / SystemVerilog / UVM / OVM applied in real DV projects.
Linux and version control (Git / Perforce) for daily verification tasks.
Strong understanding of digital electronics and semiconductor fundamentals
Why Join Truechip?
Work on cutting-edge IP/SoC projects.
Hands-on exposure to DV methodologies and verification frameworks.
Grow under experienced mentors in a fast-paced semiconductor environment.
Apply Now: diksha10602@truechip.net
โค7๐1
๐ Weโre Hiring: Physical Verification Engineer
๐ Location: Bangalore
๐ผ Experience: 0โ3 Years
๐ Notice Period: Immediate to 1 Month
Are you passionate about VLSI and eager to begin your journey in Physical Verification?
Weโre looking for talented engineers with hands-on experience in Innovus to join our dynamic team!
๐ Key Responsibilities:
๐ธ Run Design Rule Checking (DRC) using industry-standard tools and collaborate with layout designers to resolve issues.
๐ธ Perform Layout vs. Schematic (LVS) checks to ensure design accuracy.
๐ธ Conduct Electrical Rule Checking (ERC) to verify electrical integrity.
๐ธ Work on Design for Manufacturing (DFM) and Process Technology Calibration.
๐ธ Implement Resolution Enhancement Techniques (RET) and Fill Insertion.
๐ธ Handle Multi-patterning, Hotspot Analysis, and Post-processing simulations.
๐ธ Collaborate with process integration teams for smooth fabrication integration.
๐ธ Maintain detailed documentation of verification processes and methodologies..
โจ Good to have
๐ธExperience with Cadence Innovus tool is mandatory.
If youโre ready to grow your career in the semiconductor domain, weโd love to hear from you!
๐ฉ Interested candidates can share their resume at - pranjali@digicomm.org
๐ Location: Bangalore
๐ผ Experience: 0โ3 Years
๐ Notice Period: Immediate to 1 Month
Are you passionate about VLSI and eager to begin your journey in Physical Verification?
Weโre looking for talented engineers with hands-on experience in Innovus to join our dynamic team!
๐ Key Responsibilities:
๐ธ Run Design Rule Checking (DRC) using industry-standard tools and collaborate with layout designers to resolve issues.
๐ธ Perform Layout vs. Schematic (LVS) checks to ensure design accuracy.
๐ธ Conduct Electrical Rule Checking (ERC) to verify electrical integrity.
๐ธ Work on Design for Manufacturing (DFM) and Process Technology Calibration.
๐ธ Implement Resolution Enhancement Techniques (RET) and Fill Insertion.
๐ธ Handle Multi-patterning, Hotspot Analysis, and Post-processing simulations.
๐ธ Collaborate with process integration teams for smooth fabrication integration.
๐ธ Maintain detailed documentation of verification processes and methodologies..
โจ Good to have
๐ธExperience with Cadence Innovus tool is mandatory.
If youโre ready to grow your career in the semiconductor domain, weโd love to hear from you!
๐ฉ Interested candidates can share their resume at - pranjali@digicomm.org
โค4
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