We are hiring RTL
hashtag
#DesignVerification Engineers for our Digital IP R&D Team at Cadence, Noida/Bangalore.
Experience: 8-12 Years (Multiple positions)
Qualification: B.Tech/M.Tech (EE/EC/CS)
Mandatory Skills: Strong SV/UVM/Testbench development skills with working knowledge of PCIe, CXL, USB, Ethernet or similar protocols.
Send your resume to: cdn_dip_hiring@cadence.com with Subject "RTL Verification | Experience: <#> Yrs | Location: <Noida or Bangalore>"
hashtag
#DesignVerification Engineers for our Digital IP R&D Team at Cadence, Noida/Bangalore.
Experience: 8-12 Years (Multiple positions)
Qualification: B.Tech/M.Tech (EE/EC/CS)
Mandatory Skills: Strong SV/UVM/Testbench development skills with working knowledge of PCIe, CXL, USB, Ethernet or similar protocols.
Send your resume to: cdn_dip_hiring@cadence.com with Subject "RTL Verification | Experience: <#> Yrs | Location: <Noida or Bangalore>"
❤2
Interim Engineering Intern_2026_HW
https://careers.qualcomm.com/careers/job/446706885092?hl=en-US&domain=qualcomm.com&source=APPLICANT_SOURCE-6-2
https://careers.qualcomm.com/careers/job/446706885092?hl=en-US&domain=qualcomm.com&source=APPLICANT_SOURCE-6-2
Qualcomm
Interim Engineering Intern_2026_HW | Qualcomm Careers | Engineering Jobs and More | Qualcomm
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