We’re Hiring: Design Verification Engineer | Youzentech Technologies
Are you an experienced Design Verification Engineer with expertise in high-speed protocols and a drive to work on cutting-edge semiconductor solutions?
Join our passionate team at Youzentech and be part of projects shaping the future of technology!
📍 Location: Bangalore
🔧 Required Skills & Experience:
✅ 5+ years of hands-on experience in ASIC Design Verification
✅ Strong proficiency in SystemVerilog (SV) and UVM methodology
✅ Practical knowledge of PCIe and LPDDR protocols
✅ Solid understanding of Verilog
✅ Scripting skills in Python or Perl
✅ Familiarity with EDA tools, simulators, and debug environments
📩 How to Apply:
Send your resume to shraddhas@youzentech.com
📌 Subject line: Design Verification – [Your Years of Experience]
Are you an experienced Design Verification Engineer with expertise in high-speed protocols and a drive to work on cutting-edge semiconductor solutions?
Join our passionate team at Youzentech and be part of projects shaping the future of technology!
📍 Location: Bangalore
🔧 Required Skills & Experience:
✅ 5+ years of hands-on experience in ASIC Design Verification
✅ Strong proficiency in SystemVerilog (SV) and UVM methodology
✅ Practical knowledge of PCIe and LPDDR protocols
✅ Solid understanding of Verilog
✅ Scripting skills in Python or Perl
✅ Familiarity with EDA tools, simulators, and debug environments
📩 How to Apply:
Send your resume to shraddhas@youzentech.com
📌 Subject line: Design Verification – [Your Years of Experience]
❤3
39 th International Conference On VLSI Design and 25 th International Conference On Embedded Systems
3rd to 7th January 2026 | JW Marriott Pune
https://gyhcs.r.ag.d.sendibm3.com/mk/cl/f/sh/6rqJfgq8dINmNvd2HB7kDA9bqjR/6tS4xWdVGyM4
3rd to 7th January 2026 | JW Marriott Pune
https://gyhcs.r.ag.d.sendibm3.com/mk/cl/f/sh/6rqJfgq8dINmNvd2HB7kDA9bqjR/6tS4xWdVGyM4
❤3
Mediatek Bangalore is hiring for the below positions:
->DFT Engineer (3-15 YOE)
->Physical Design Engineer (4-15 YOE)
->Analog Design Engineer (8-15 YOE)
->Physical Verification Engineer (5-15 YOE)
->UEFI Developer (5-15 YOE)
->Design Verification Engineer (3-15 YOE)
->CAD Design Engineer (5-15 YOE)
->AMS Verification Engineer (3-10 YOE)
If anyone is interested, please share your resume through DM or mail to garima.goyal@mediatek.com
->DFT Engineer (3-15 YOE)
->Physical Design Engineer (4-15 YOE)
->Analog Design Engineer (8-15 YOE)
->Physical Verification Engineer (5-15 YOE)
->UEFI Developer (5-15 YOE)
->Design Verification Engineer (3-15 YOE)
->CAD Design Engineer (5-15 YOE)
->AMS Verification Engineer (3-10 YOE)
If anyone is interested, please share your resume through DM or mail to garima.goyal@mediatek.com
HCLTech is Hiring – ASIC/IP/SoC Verification Engineers 🚀
We’re expanding our Silicon Design & Engineering team and looking for experienced verification professionals who are passionate about building next-gen semiconductor solutions.
🔍 Role: ASIC/IP/SoC Verification Engineer
📍 Locations: Bangalore | Hyderabad | Noida | Kochi | Chennai
🧠 Experience: 5 to 16 years
📆 Notice Period: 0 to 90 days
❗️ Please do not share profiles with less than 5 years of experience.
🔧 Key Skills We’re Looking For:
Strong expertise in SystemVerilog/UVM-based verification
Experience in IP/Subsystem/SoC level verification
Hands-on with simulation tools (VCS, Questa, etc.)
Familiarity with AMBA protocols (AXI, AHB, APB)
Debugging skills using waveform viewers and scripting (Python/Perl/TCL)
📩 Interested or know someone who fits?
Send your resume or referrals to: aman-singh1@hcltech.com
We’re expanding our Silicon Design & Engineering team and looking for experienced verification professionals who are passionate about building next-gen semiconductor solutions.
🔍 Role: ASIC/IP/SoC Verification Engineer
📍 Locations: Bangalore | Hyderabad | Noida | Kochi | Chennai
🧠 Experience: 5 to 16 years
📆 Notice Period: 0 to 90 days
❗️ Please do not share profiles with less than 5 years of experience.
🔧 Key Skills We’re Looking For:
Strong expertise in SystemVerilog/UVM-based verification
Experience in IP/Subsystem/SoC level verification
Hands-on with simulation tools (VCS, Questa, etc.)
Familiarity with AMBA protocols (AXI, AHB, APB)
Debugging skills using waveform viewers and scripting (Python/Perl/TCL)
📩 Interested or know someone who fits?
Send your resume or referrals to: aman-singh1@hcltech.com
❤3