Electronics Geek | Electrical and Electronics Job Updates / VLSI / embedded
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Hi All,
Greetings from Juntran Technologies,
Here we are hiring VLSI Trained freshers for the Bangalore Location,
hashtag#Physical Design
hashtag#Design for testability
hashtag#RTL Design
hashtag#Analog layout
hashtag#Immediate Hiring
If you have any profiles kindly share those Profiles to this email id :
reshmashaik@juntrantech.com
Greetings from Juntran Technologies,
Here we are hiring VLSI Trained freshers for the Bangalore Location,
hashtag#Physical Design
hashtag#Design for testability
hashtag#RTL Design
hashtag#Analog layout
hashtag#Immediate Hiring
If you have any profiles kindly share those Profiles to this email id :
reshmashaik@juntrantech.com
(HIRING M.Tech Graduates 2020-2024)
Company: ROUTE2SOC Technologies Pvt. Ltd.
Position: Physical Design Engineer
Eligibility: M.Tech Graduates (2020-2024) in VLSI, Electronics, or related fields
Location: [Bangalore]
Job Type: Full-time
Responsibilities:
Work on floorplanning, placement, routing, and timing analysis.
Optimize designs for power, performance, and area (PPA).
Collaborate with RTL teams and debug design issues.
How to Apply:
Send your resume to hr@route2soc.com.
Company: ROUTE2SOC Technologies Pvt. Ltd.
Position: Physical Design Engineer
Eligibility: M.Tech Graduates (2020-2024) in VLSI, Electronics, or related fields
Location: [Bangalore]
Job Type: Full-time
Responsibilities:
Work on floorplanning, placement, routing, and timing analysis.
Optimize designs for power, performance, and area (PPA).
Collaborate with RTL teams and debug design issues.
How to Apply:
Send your resume to hr@route2soc.com.
We Are Hiring!
Join our team in Hyderabad as an SoC Engineer Trainee and work on cutting-edge VLSI Design, SoC Architecture, and Power Optimization projects.
Experience: 0-7 years (M.Tech freshers with VLSI specialization are welcome!)
Location: 📍 Hyderabad
Key Responsibilities:
🔹 Power architecture and tradeoff analysis
🔹 Chipset and system-level power modeling & optimization
🔹 Identifying power requirements and addressing risks
🔹 Collaborating with cross-functional teams (software, hardware, etc.)
🔹 Customer interaction to meet power needs & showcase chipset capabilities
Must-Have Skills:
✔️ VLSI Design
✔️ SoC Architecture
✔️ Power Optimization
✔️ Performance Analysis
✨ Ready to shape the future of SoC design?
https://careers.qualcomm.com/careers/job/446702790255
Join our team in Hyderabad as an SoC Engineer Trainee and work on cutting-edge VLSI Design, SoC Architecture, and Power Optimization projects.
Experience: 0-7 years (M.Tech freshers with VLSI specialization are welcome!)
Location: 📍 Hyderabad
Key Responsibilities:
🔹 Power architecture and tradeoff analysis
🔹 Chipset and system-level power modeling & optimization
🔹 Identifying power requirements and addressing risks
🔹 Collaborating with cross-functional teams (software, hardware, etc.)
🔹 Customer interaction to meet power needs & showcase chipset capabilities
Must-Have Skills:
✔️ VLSI Design
✔️ SoC Architecture
✔️ Power Optimization
✔️ Performance Analysis
✨ Ready to shape the future of SoC design?
https://careers.qualcomm.com/careers/job/446702790255
Qualcomm
Senior Systems Engineer - Chipset Power | Qualcomm Careers | Engineering Jobs and More | Qualcomm
Search open positions at Qualcomm. Learn more about how our culture of collaboration and robust benefits program allow our employees to live well and exceed their potential.
H1B Opportunity at Mirafra Technologies
Looking out for Physical Design - Innovus, DFT, STA, Synthesis, PTPX, PDN Engineers
Experience - 8 to 12 years
For details pls call at +91 - 9007115796
Apply at sayantikamajumdar@mirafra.com
Looking out for Physical Design - Innovus, DFT, STA, Synthesis, PTPX, PDN Engineers
Experience - 8 to 12 years
For details pls call at +91 - 9007115796
Apply at sayantikamajumdar@mirafra.com
Electronics Geek | Electrical and Electronics Job Updates / VLSI / embedded pinned «http://youtube.com/post/Ugkxp_vLI1uyaV2N9wjjHKklPP2Ux0NU3VFB?si=jGUVxJcxvpxOZKdO»