🌟 We Are Hiring! Multiple Opportunities at Mirafra Technologies 🌟
📍 Locations:
🇺🇸 USA: Cupertino (Bay Area), San Jose, San Diego, Irvine – California
🇪🇺 Europe: Germany
🇮🇳 India: Bangalore, Hyderabad, Noida | WFH Options for Select Roles
⏳ Notice Period: 0–90 days (varies by role)
🔍 Open Positions:
🇺🇸 USA Roles:
1️⃣ Senior Design Verification Engineer
Experience: 5+ Years in Design Verification
Location: Cupertino (Bay Area), San Jose, San Diego, Irvine – California
Requirements: Valid USA Work Authorization (Engineers from any location can apply)
🇪🇺 Europe Roles:
2️⃣ Design Verification Engineers
Location: Germany
Experience: 5+ Years
Must-Have: Specman Expertise
🇮🇳 India Roles:
3️⃣ Design Verification Engineers
PCIe – 5+ Years (Bangalore/Hyderabad)
FUSA/NOC – 3+ Years (Bangalore/Hyderabad)
UFS – 4+ Years (WFH/Any Location)
DDR – 5+ Years (WFH/Any Location)
IP/SoC (ARM-Based) – 3+ Years (Noida)
Ethernet – 3+ Years (Noida)
HSIO – 5+ Years (Bangalore/Hyderabad)
AMS Verification – 3+ Years (Bangalore/Hyderabad)
Formal Verification – 3+ Years (Bangalore)
ACE/CHI Expertise – 5+ Years (Bangalore)
4️⃣ Post Silicon Validation Engineers
Experience: 3+ Years
Locations: Bangalore, Hyderabad, Noida
5️⃣ DV Trainer
Location: Bangalore/Hyderabad
Expertise: SystemVerilog, UVM
📧 Apply Now: Send your resume to pkalavathi@mirafra.com
🔗 Referrals are welcome and much appreciated!
📍 Locations:
🇺🇸 USA: Cupertino (Bay Area), San Jose, San Diego, Irvine – California
🇪🇺 Europe: Germany
🇮🇳 India: Bangalore, Hyderabad, Noida | WFH Options for Select Roles
⏳ Notice Period: 0–90 days (varies by role)
🔍 Open Positions:
🇺🇸 USA Roles:
1️⃣ Senior Design Verification Engineer
Experience: 5+ Years in Design Verification
Location: Cupertino (Bay Area), San Jose, San Diego, Irvine – California
Requirements: Valid USA Work Authorization (Engineers from any location can apply)
🇪🇺 Europe Roles:
2️⃣ Design Verification Engineers
Location: Germany
Experience: 5+ Years
Must-Have: Specman Expertise
🇮🇳 India Roles:
3️⃣ Design Verification Engineers
PCIe – 5+ Years (Bangalore/Hyderabad)
FUSA/NOC – 3+ Years (Bangalore/Hyderabad)
UFS – 4+ Years (WFH/Any Location)
DDR – 5+ Years (WFH/Any Location)
IP/SoC (ARM-Based) – 3+ Years (Noida)
Ethernet – 3+ Years (Noida)
HSIO – 5+ Years (Bangalore/Hyderabad)
AMS Verification – 3+ Years (Bangalore/Hyderabad)
Formal Verification – 3+ Years (Bangalore)
ACE/CHI Expertise – 5+ Years (Bangalore)
4️⃣ Post Silicon Validation Engineers
Experience: 3+ Years
Locations: Bangalore, Hyderabad, Noida
5️⃣ DV Trainer
Location: Bangalore/Hyderabad
Expertise: SystemVerilog, UVM
📧 Apply Now: Send your resume to pkalavathi@mirafra.com
🔗 Referrals are welcome and much appreciated!
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